At Veridise, Tim serves as a Senior R&D Engineer. Tim conducts ZK circuit related security audits and is a member of our in-house tooling development team.
He has conducted academic research in language-based security, focusing on information flow control of JVM bytecode programs through hybrid static and dynamic program analysis.
In addition to his academic accomplishments, Tim brings extensive experience from his role at Cirrus360, where he constructed a new domain-specific language (DSL) and developed a compiler. Previously, he worked at Ericsson and FutureWei Technologies.
Tim earned his M.Sc. in Computer Science from The University of Texas at Dallas.
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